J. Cent. South Univ. Technol. (2011) 18: 744-748
DOI: 10.1007/s11771-011-0757-8
Analysis and simulation of lateral PIN photodiode gated by transparent electrode fabricated on fully-depleted SOI film
XIE Hai-qing(谢海情), ZENG Yun(曾云), ZENG Jian-ping(曾健平), WANG Tai-hong(王太宏)
School of Physics and Microelectronics Science, Hunan University, Changsha 410082, China
? Central South University Press and Springer-Verlag Berlin Heidelberg 2011
Abstract: A novel device, lateral PIN photodiode gated by transparent electrode (LPIN PD-GTE) fabricated on fully-depleted SOI film was proposed. ITO film was adopted in the device as gate electrode to reduce the light absorption. Thin Si film was fully depleted under gate voltage to achieve low dark current and high photo-to-dark current ratio. The model of gate voltage was obtained and the numerical simulations were presented by ATLAS. Current-voltage characteristics of LPIN PD-GTE obtained in dark (dark current) and under 570 nm illumination (photo current) were studied to achieve the greatest photo-to-dark current ratio for active channel length from 2 to 12 ?m. The results show that the photo-to-dark current ratio is 2.0×107, with dark current of around 5×10-4 pA under VGK=0.6 V, PIN=5 mW/cm2, for a total area of 10 ?m×10 ?m in fully depleted SOI technology. Thus, the LPIN PD-GTE can be suitable for high-grade photoelectric systems such as blue DVD.
Key words: lateral PIN photodiode; transparent electrode; physical model; photo-to-dark current ratio; silicon-on-insulator
1 Introduction
Nowadays, short distance optical communications and optical storage (OS) systems such as blue DVD require fast (gigahertz to tens of gigahertz bandwidth) and responsive photodetectors with high photo-to-dark current ratio increasingly [1-2]. Bulk silicon detectors, however, hardly cope with these specifications, mainly in regards to bandwidth, and nonintegrated detectors are usually used due to high dark currents of photodiode and low sensitivity of MOS structure (due to only one kind of carrier and light-absorption of gate) in CMOS process less than 0.25 ?m [3-6]. The ultimate performances of optical receiver circuits are limited because of high bonding capacitor, cost and area, which is a limitation for the employment in local-area networks, inter-chip/ intra-chip interconnects, and Ethernet [7-8].
Lateral PIN photodiode on SOI has been the focus for extensive research over the past decade due to its high responsivity and quantum efficiency [9-10]. However, high reverse bias needs to be used in this PIN photodiode to achieve a low capacitance and high sensitivity. In addition, it is not propitious to integration for the small input resistance [11]. In the modern microelectronic integration industry, MOS is the fundamental ingredient since it has large input resistance, low noise and wide spectrum range [12-13].
In order to achieve low dark current and high photo current under low reverse voltage, lateral PIN photodiode gated by transparent electrode (LPIN PD-GTE) based on partially depleted (PD) SOI film compatible with CMOS process was proposed recently [14]. The structure of LPIN PD-GTE is very similar to traditional MOS structure, but only ITO is applied as gate to reduce the light absorption. In the previous work, a physical model was presented based on standard semiconductor equations under partial depletion. The numerical calculation indicated that LPIN PD-GTE has high sensitivity and signal to noise ratio (SNR). In this work, the characteristics of LPIN PD-GTE fabricated on FD SOI substrate are focused on.
2 Device structure
Thin film SOI LPIN PD-GTE was realized in the FD SOI CMOS technology with the parameters shown in Fig.1. The thickness of thin Si film, dSi, is equal to 200 nm; the thickness of the front oxide, dFOX, is equal to 20 nm; the thickness of the buried oxide (BOX), dBOX, is equal to 380 nm; the thickness of substrate, dsub, is equal to 500 nm. The length of N+ and P+ zones, LPN, is equal to 1 μm and different L values, the length of the channel typically corresponding to a P--doping of 1015 cm-3, of 2, 4, 6, 8, 10 and 12 μm are selected.
The absorption in ITO film is the main loss of incident light. The measurement for transmittance vs the wavelength of ITO film is presented in Fig.2. It can be seen that the transmittance of ITO film is higher than 80% for wavelength of 500-700 nm, and can be adopted as gate electrode to reduce light absorption. The deposition of ITO was performed in a vacuum chamber, where the preliminary pressure was set to be 1×10-3 Pa. Sputtering was done at a pressure of 0.5 Pa at a constant power of 100 W. During the sputtering process, the substrate was always kept at 150 °C for 1.5 h.

Fig.1 Schematic cross-section of thin film SOI LPIN PD-GTE

Fig.2 Transmittance vs wavelength of ITO film deposited on glass and plastic with thickness of 100 nm
In LPIN PD-GTE, the depletion but not inversion region is formed by VGK (the voltage between electrode G and electrode K) under lower VAK (the voltage between electrode A and electrode K) in channel to decrease the dark current and increase the internal quantum efficiency.
In LPIN PD-GTE, the Poisson’s distribution is obtained:
(1)
where φ, q, NA and εSi, are the potential at y position, the magnitude of electron charge, the doping concentration and the permittivity of Si, respectively.
Using the boundary condition, Eq.(2) could be got:
(2)
where φsf and φsb are the front surface potential and the back surface potential, respectively.
(3)
(4)
where fmsf, fmsb, Qoxf, Qoxb, Qinvf and Qsb are the difference of front work-function, the difference of back work-function, the front interface charge per unit area, the back interface charge per unit area, the charge quantity in the inversion region at the front interface and the charge quantity in the inversion or accumulation region at the back interface, respectively. CSi, Cox, Cbox are the capacitance of Si film per unit area, the front oxide capacitance per unit area, and the back oxide capacitance per unit area, respectively, and are given by


(5)
Qdep is the charge quantity in depletion region and is presented by
Qdep=-qNAdSi (6)
Because the channel is in the depletion region but not the inversion region, φsf=ff, Qinvf=Qsb=0, and for Vbg=0, Eq.(7) could be obtained:

(7)
where ff is the Fermi potential of the material.
3 Device simulation and discussion
3.1 Numerical simulation
Numerical simulation was conducted with a two-dimensional (2D) device analysis program (ATLAS by SILVACO, Inc.) implemented on a WINDOWS system [15]. To obtain improved resolution in the regions of interest, a very fine mesh was required in the thin film where steep gradients in the electrical field were anticipated. A total of 19 332 grid nodes and 38 092 elements (triangles) were used in modeling the intermediate length sample (L=10 μm) with a commensurate increase/decrease in the number of nodes and elements for the longer and shorter samples, respectively. The Gummel-Newton-based numerical algorithms were implemented and used by the simulation program in order to solve the discretized form of the field equations [16].
In order to understand the behavior of the current in the depletion region, it was essential to study in detail the volume distribution of the carriers for the entire thin film. The simulation results for the electron and hole concentrations are given in Fig.3. The data were taken from the cut line from the front interface to the back interface by utilizing a cut line at the middle of the channel, where zero in Fig.3 is taken to be at the front interface. For different channel lengths, the concentration of electrons at the front interface is lower than 1015 cm-3 at VGK=1 V. In other words, the whole thin film is in the depletion region at VGK=1 V, which is consistent with Eq.(7). It is also indicated in Fig.3 that the concentration of electrons at front interface in L=2 μm is lower than that in other channel lengths due to the influence of VAK.

Fig.3 Simulation results for electron and hole concentration at middle of channel for VGK=1 V, dSi=200 nm and different active channel lengths: (a) 2 μm; (b) 4 μm; (c) 6 μm; (d) 8 μm; (e) 10 μm; (f) 12 μm
3.2 Photo-current characteristics
Figure 4 displays the output characteristics of the device with different channel lengths and different gate voltages. No difference under different gate voltages observed in Fig.4(a) can be easily recognized because the depletion region in the thin film is formed by VAK but not VGK with a channel length L=2 μm. A similar behavior is observed in Fig.4(b) referring to the device with a channel length L=4 μm, with depletion effect becoming less pronounced under VAK as the channel length increases. Note that for the channel lengths exceeding 6 μm, the depletion effect under VAK is not discernible, and pronounced differences are observed under different gate voltages. On the other hand, obvious differences are obtained from VGK=0 V to VGK=0.6 V and the differences from VGK=0.6 V to VGK=1.0 V are not discernible, due to weak inversion in thin film under VGK beyond 0.6 V (channel lengths exceeding 6 μm).

Fig.4 Photo-current vs illuminating power corresponding to VGK=0, 0.3, 0.6, 0.9, 1.0 V with W=10 μm, dSi=200 nm and different active channel lengths: (a) 2 μm; (b) 4 μm; (c) 6 μm; (d) 8 μm; (e) 10 μm; (f) 12 μm
3.3 Dark current characteristics
Figure 5 shows the I-V characteristics of LPIN PD-GTE in dark for different channel lengths. The dark current is originated from the thermionic emission of carriers. It is indicated that dark current increases along with increasing the active channel length at a certain VGK. It can also be seen clearly that dark currents for different channel lengths all vary along with VGK. However, they are almost horizontal with VGK lower than 0.6 V, and increase rapidly exceeding 0.6 V due to the weak inversion formed by VGK. Furthermore, the increasing scope is over tenfold.

Fig.5 Dark-current vs VGK arranging from 0 V to 1.0 V with W=10 μm, dSi=200 nm and active channel length L=2, 4, 6, 8, 10 and 12 μm
From Fig.4 and Fig.5, for L=10 μm, W=10 μm, VGK=0.6 V and PIN=5 mW/cm2, the photo current and dark current are 1.0×10-8 A and 5.0×10-16 A, respectively. This indicates that the photo-to-dark current ratio is up to 2.0×107.
4 Conclusions
1) ITO film with the transmittance higher than 80% for wavelength from 500 nm to 700 nm is adopted as gate in LPIN PD-GTE fabricated on FD SOI film to reduce light absorption. Thin film is fully depleted by VGK but not VAK.
2) The physical model of VGK is obtained based on the standard semiconductor equations. The numerical simulations are performed by 2D Atlas using the Gummel-Newton-based numerical algorithms. For the active channel length from 2 to 12 μm, the thin film is in the depletion region but not the inversion region at VGK=1.0 V. Due to the influence of VAK, the effect of VGK on the photo-current is not discernible at L=2 μm and 4 μm.
3) Pronounced differences are observed under different gate voltage VGK for channel lengths exceeding 6 μm. For different channel lengths, dark currents are almost horizontal with VGK lower than 0.6 V, and increase rapidly exceeding 0.6 V due to the weak inversion.
4) Under VGK=0.6 V, PIN=5 mW/cm2, the photo-to- dark current ratio is up to 2.0×107, with dark current of around 5.0×10-16 A for a total area of 10 ?m×10 ?m, which appears highly suitable for the blue DVD applications.
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(Edited by YANG Bing)
Foundation item: Project(61040061) supported by the National Natural Science Foundation of China; Project supported by Hunan Provincial Innovation Foundation for Postgraduate Students, China
Received date: 2010-01-31; Accepted date: 2011-01-05
Corresponding author: ZENG Yun, Professor; Tel: +86-731-88822332; E-mail: zengyun@hnu.cn