中南大学学报(自然科学版)

DOI: 10.11817/j.issn.1672-7207.2020.09.013

异步对称双栅InGaZnO薄膜晶体管表面电势的解析模型

何伊妮1,邓联文1, 2,甄丽营1,覃婷1,廖聪维1,罗衡1, 2,黄生祥1

(1. 中南大学 物理与电子学院,湖南 长沙,410083;

2. 湖南省新型片式电感及先进制造装备工程技术研究中心,湖南 怀化,419600)

摘 要:

栅结构的氧化铟镓锌(InGaZnO)薄膜晶体管(thin film transistors,TFTs),求解泊松方程,并根据载流子在亚阈区、导通区的不同分布特点,在亚阈区引入等效平带电压的概念,在导通区运用Lambert W函数近似,建立异步对称双栅InGaZnO TFT表面电势解析模型。该模型的拟合参数只有2个,能够较好地反映介电层厚度、沟道电压等参数对电势的影响。基于所建模型及TCAD分析,研究InGaZnO层厚度、栅介质层厚度以及缺陷态密度等物理量对独立栅控双栅晶体管表面电势的影响。研究结果表明:在亚阈区,表面电势随着底栅电压增大呈近似线性增大,且在顶栅电压调制作用下平移;在导通区,表面电势随着底栅电压的增加逐步饱和,且电势值与顶栅调制电压作用相关度小。表面电势的解析模型与TCAD数值计算结果对比,具有较高的吻合度;在不同缺陷态密度分布情况下,电势模型的计算值与TCAD分析值相对误差均小于10%。本研究成果有利于了解双栅InGaZnO TFT的导通机制,可用于InGaZnO TFT的器件建模及相关集成电路设计。

关键词:

双栅薄膜晶体管表面势解析模型铟镓锌氧化物

中图分类号:O47                    文献标志码:A

文章编号:1672-7207(2020)09-2480-09

Surface potential model for amorphous InGaZnO thin-film transistors with independent symmetric double-gate

HE Yini1, DENG Lianwen1, 2, ZHEN Liying1, QIN Ting1, LIAO Congwei1, LUO Heng1, 2,HUANG Shengxiang1

(1. School of Physics and Electronics, Central South University, Changsha 410083, China;

2. Engineering Technology Research Center in Novel Chip Inductance and Advanced Manufacturing Equipment of Hunan Province, Huaihua 419600, China)

Abstract: An analytical surface potential model for the independent symmetric double-gate InGaZnO TFTs(thin film transistors) was presented.The Poisson equation was solved according to the different carrier density distributions in the subthreshold and conduction region. In the subthreshold region, the concept of equivalent flat band voltage was introduced, and in the conduction region, the approximated Lambert W function was applied to develop the analytical surface potential model for the amorphous InGaZnO thin-film transistors with independent symmetric double-gate. Furthermore, the effects of the different oxide thickness, the active layer thickness and the density of defect states were discussed. The results show that, in the subthreshold region, the surface potential increases approximately linearly with the increase of the bottom grid voltage, the surface potential shifts during the top-gate voltage modulation. In the conduction region, the surface potential has few correlation with the top-gate voltage. The present potential model shows excellent agreement with the simulation values. In the case of different densities of state distribution, the relative error of the calculation model and the TCAD analysis value is less than 10%. The result is helpful to understand the conduction mechanism of the InGaZnO TFTs, and is useful for the InGaZnO TFT device simulation and the related integrated circuit design.

Key words: independent double-gate TFTs(thin film transistors); surface potential; analytical model; InGaZnO

金属氧化物薄膜晶体管(thin film transistor,TFT)具有载流子迁移率高、器件大面积制备的电学均匀性好、适合柔性基板集成等优点,在新型显示、图像传感器、电路集成领域具有广阔的发展前景[1-2]。在诸多新型金属氧化物TFT中,氧化铟镓锌(InGaZnO) TFT的可靠性较高、制备工艺较成熟,有望成为下一代TFT技术的主流[3-6]。与普通单栅结构相比,双栅结构的InGaZnO TFT具有场效应迁移率高、亚阈斜率小、驱动能力强等优点[7-9],从而更适合在显示面板上实现驱动电路或者传感电路的集成。采用异步双栅InGaZnO TFT器件有利于增加电路设计的灵活性,因为2个栅极电压可以独立偏置。独立偏置的双栅InGaZnO TFT实际上是1个四端子器件,多出来的控制栅极可以较大范围调节TFT的沟道电势分布。对于显示面板内指纹图像传感器、X光传感面板等,只有准确了解InGaZnO TFT表面电势与几何参数和物理参数的关系,才可能定量地分析图像传感器的残像、串扰等问题[10-12],并且当异步双栅InGaZnO TFT应用于有源矩阵式有机发光二极管(AMOLED)像素电路时,通过顶栅电压可有效地动态调节器件的阈值电压,增强像素电路的补偿效果[13-16]。而异步双栅InGaZnO TFT阈值电压的准确值与TFT的表面电势分布密切相关,因此,针对双栅InGaZnO TFT建立表面电势的物理模型,对于图像传感阵列、显示基板上大规模电路集成等具有重要意义。经典的双栅金属-氧化物-半导体场效应晶体管(MOSFET)的沟道电势解析模型由TAUR[17]提出,该模型物理意义清晰,而且结构简洁。SAHOO等[18]基于通用复变量方程,提出了用于非对称独立驱动双栅MOSFET的沟道电势模型,可以较好地分析不同电压偏置条件下的MOSFET的电学特性。但由于存在较复杂的缺陷态分布,以上这些模型都不能直接用于TFT的特性分析。HUANG等[19]建立了对称双栅Poly-Si TFT的表面势模型,其准确性与数值迭代结果的准确性相当。针对InGaZnO TFT这种新型的器件,相关研究还较少,为此,本文作者对异步对称双栅InGaZnO TFT沟道电势的泊松方程进行研究,应用高斯定理推导表面电势与栅源电压的关系。根据表面电势在不同顶栅偏置时,在亚阈区及导通区表现出的变化规律,引入等效平带电压概念,进一步简化并建立异步对称双栅InGaZnO TFT表面电势的解析模型,并讨论有源层、氧化层以及InGaZnO TFT特有的缺陷态密度对异步双栅InGaZnO TFT表面电势的影响,分析引起电势变化的物理机制。

1  电势模型的建立

图1所示为异步对称双栅InGaZnO TFT的器件结构。其中,平行于沟道的方向为Y轴,垂直于沟道的方向为X轴,tIGZO,tOXF及tOXB分别为器件的有源层厚度、顶栅介质层厚度和底栅介质层厚度,L为有源层InGaZnO的长度。本文重点研究顶栅电压VGT与底栅电压VGB相互独立偏置情况下InGaZnO TFT的表面势分布。顶部的栅极厚度和氧化层厚度分别与底部的栅极厚度和氧化层厚度相等,故称该器件为异步对称双栅InGaZnO TFT。

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图1 异步对称双栅InGaZnO TFT的剖面结构

Fig. 1 Cross sectional view of independent symmetric double-gate InGaZnO TFTs

图2所示为InGaZnO TFT有源层的态密度模型[20]。对于InGaZnO TFT,在导带底(CBM)和价带顶(VBM)附近存在类受主带尾态密度gTA(E)、类受主深能态密度gDA(E)、类施主带尾态密度gTD(E)、类施主深能态密度gDD(E)。其中,由于InGaZnO结构内部存在缺陷,导致形成带尾态密度gTA(E)和gTD(E),而InGaZnO中氧空位释放载流子后形成悬挂键,导致在禁带内形成深能态gDA和gDD(E)[21]。这些能级的表达式如下:

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图2 a-InGaZnO TFTs态密度示意图

Fig. 2 Diagram of subgap density of state in InGaZnO active layer

(1)

其中:nTA,nDA,nTD和nDD分别为TA,DA,TD和DD这4种缺陷态密度分布的中心浓度;k为玻尔兹曼常数;TTA,TDA,TTD和TD分别为这4种缺陷态密度的有效特征温度;EC和EV分别为导带底(CBM)和价带顶(VBM)的能量。

考虑到InGaZnO薄膜为本征/轻掺杂N型半导体材料,影响沟道电势分布的不仅有自由载流子,而且有局域态载流子,InGaZnO TFT的沟道电势应满足泊松方程:

  (2)

式中:ρ为电子密度(C/cm3);εIGZO为非晶InGaZnO的介电常数;nfree为自由载流子密度,;nloc为缺陷态载流子密度,为带尾态密度和深能态密度的叠加,

由于缺陷态很复杂,导致泊松方程求解很困难,引入有效载流子密度[22]。基于一维缓变沟道近似(gradual chanel approximation, GCA)成立,泊松方程可以简化为

(3)

式中:NEFF为有效载流子密度,其典型值为5×1018 cm-3·eV-1[23];k为玻尔兹曼常数,k=1.380 649×10-23 J/K;TEFF为有效特征温度,TEFF =300 K;kTEFF为有效特征能量,kTEFF=0.026 eV;VCH为y方向上的沟道电压;φF0为准费米能级。

利用导数公式求解式(3)可以得到底栅表面处的电场强度

  (4)

根据高斯定理,InGaZnO层的顶栅与底栅表面势应该分别满足如下边界条件:

(5)

式中:COX为单位面积栅氧化层电容;φT和φS分别为顶栅和底栅表面势,通过式(4)和式(5)可求得x=tIGZO处的φS

(6)

然而,式(6)所得到的表面势φS是关于底栅电压VGB的隐函数,尚不能直接用于计算。为了求得φS与VGB的直接关系,应用整体代换的方式:

  (7)

应用Lambert W函数ω=W(x)可以解得表面势为

(8)

式中:W表示Lambert W函数。虽然由式(8)可得表面势与偏置电压的关系,但Lambert W属于超越函数,并不能嵌入SPICE仿真[24],故有必要根据TFT的实际工作情况,对式(8)进行适当简化。当器件工作在导通区(VGB-VFBF0>VCH)时,W项中的指数部分快速增大,此时,可将Lambert W函数近似为[25],则表面势φS

(9)

而在亚阈区(VGB-VFBF0<>CH)时,W项近似为0,由于φS受到顶栅偏置电压的影响,此时,φS

(10)

式中:λ表征顶栅偏置电压VGT对表面势φS的调制能力,取决于栅氧化层和有源层的等效电容的比值。VFB*为等效平带电压,其取值与顶栅的偏置电压有关。在InGaZnO TFT中靠近栅氧化层的有源层部分的有源层电容为CACT,氧化层电容为COX,表面势基本上正比于底栅电压在栅介质层和有源层上的分压,λ可表示为

(11)

一般地,平带电压可分为VFB1和VFB2,其中,VFB1表征功函数差对半导体层表面能带弯曲的影响,其取决于栅金属层材料、半导体层载流子浓度等。例如,当栅氧化层材料为钼(Mo)时,VFB1=-4.6 V[26];VFB2表征氧化层及界面电荷等影响。在顶栅电压VGT的调制下,InGaZnO层的载流子将受到影响,等效平带电压VFB可以表示为

(12)

式中:a可经拟合确定。为了将式(9)和式(10)统一成1个连续的表达式,可以利用tanh(x)作为平滑函数[27],由此最终得到表面势φS解析表达式:

(13)

2  电势模型的验证

为了验证文中模型的有效性,使用Silvaco TCAD模拟图1所示的InGaZnO TFT,并比较上述模型计算结果与TCAD模拟结果。其中,顶栅电压、底栅电压相互独立偏置且器件结构对称,即VGT≠VGB,tOXF=tOXB。表1所示为模拟和计算过程中InGaZnO TFT相关物理参数及陷阱态密度。InGaZnO TFT的偏置条件为:漏源电压VDS=0.1 V,顶栅电压VGT分别固定为-4,-5和-6 V。由于在实际应用中,多采用独立负压偏置顶栅以减少TFT的泄漏电流,这里重点考察调制电压VGT小于0 V的情况,对于VGT大于0 V的情况,可参考文献[8,22]。底栅电压VGB从0 V扫描到15 V,底栅电压扫描间隔为0.5 V。

表面势随底栅电压的变化关系见图3,其中,图3(a)所示为L=40 μm时,异步对称双栅InGaZnO TFT的表面势φS随底栅电压VGB变化的计算结果和TCAD数值模拟结果。从图3(a)可见:当VGB较小时,φS随VGB增大呈线性增大;当VGB较大时,φS接近于饱和值;另一方面,顶栅电压VGT对亚阈区的电势有明显的调制作用,当VGT增加时,φS更快地趋近于饱和;在不同的顶栅、底栅电压下,φS计算值与仿真值吻合程度都较高。图3(b)表明式(8)与式(13)的计算值符合程度较高,这说明对于Lambert W函数的近似较合理,所提出的模型有较高的可信度。

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图3 表面势随底栅电压的变化关系

Fig. 3 Relationship between surface potential and bottom-gate voltage

表1 InGaZnO TFT模型模拟和计算的参数取值

Table 1 InGaZnO TFT parameters for TCAD simulation and model calculation.

3  结果与讨论

在TCAD的仿真结果中,当顶栅电压VGT为-5 V,底栅电压VGB为15 V时,异步双栅InGaZnO TFT沟道载流子浓度和沟道电势分布见图4。从图4(a)可见:InGaZnO TFT的底部沟道处自由载流子浓度最高约为1018 cm-3,到顶部沟道有规律地逐渐减小为1011 cm-3。从图4(b)可见:InGaZnO TFT的沟道底部电势约为15 V,从底部到顶部逐渐减小。这是因为当底栅电压VGB为15 V时,大量自由载流子积累在沟道与栅绝缘层之间的界面处,该电子积累层屏蔽了底栅电场的作用,导致异步双栅InGaZnO TFT表面势φS随着底栅电压VGB的增加而趋于饱和,该情形与式(9)所示的一致。有源层顶部的表面电势和底部表面势变化趋势一致,只不过数值有少量增大,这是由于沟道电荷积累对电场的屏蔽作用在沟道层顶部和底部存在差异。

根据模型表达式计算得到的不同有源层厚度tIGZO和不同氧化层厚度tOX,表面势φS随底栅电压VGB的变化关系见图5。从图5可见:随着有源层厚度tIGZO从30 nm增加至50 nm,φS在亚阈区随着VGB增加更快地接近饱和值;随着氧化层厚度tOX从200 nm增加至220 nm,电势饱和值变小,φS在亚阈区则几乎不变化。这是因为φS的饱和值由边界式(5)决定,而不受有源层厚度的影响;但tIGZO增加会导致沟道内自由载流子数目增加,所以,φS随着VGB增加更快地达到饱和值。另一方面,tOX增加导致单位面积的栅介质电容减少,积累在沟道与栅绝缘层之间的界面处的载流子变少,分压也相应地减少,所以,亚阈区的λ仍为1/2,亚阈区的电势不变,饱和区的电势随之减小。

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图4 沟道载流子及电势分布图

Fig. 4 Channel electron concentration and channel potential distribution

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图5 不同的材料层厚度下表面势随栅极电压的变化

Fig. 5 Relationship between surface potential and gate voltage at different material thicknesses

InGaZnO TFT的电学特性受InGaZnO薄膜中缺陷态密度的影响很大[28]。为了进一步研究InGaZnO TFT表面势受到实际缺陷态密度的影响,利用TCAD分析InGaZnO TFT的4种缺陷态密度对表面势的影响,缺陷态密度取值如表1所示。在不同类受主带尾中心分布浓度nTA和类受主深能中心分布浓nDA下,表面势φS随底栅电压VGB变化的关系见图6。从图6(a)可见:当nTA从1.55×1016 cm-3·eV-1增加到6.5×1020 cm-3·eV-1时,表面势导通区随nTA增加而略微减小。从图6(b)可见:当nDA从6.5×1014 cm-3·eV-1增加到6.5×1018 cm-3·eV-1时,表面势导通区随nDA增加而显著减小。这是因为受主陷阱态可俘获自由载流子,nDA增加导致沟道电子减少,从而电场变小,导通区表面势减小。

对照本文所建立的电势模型,当nDA从6.5×1014 cm-3·eV-1变化到6.5×1018 cm-3·eV-1时,对应于所建模型中的NEFF从6.5×1016 cm-3·eV-1变化到6.5×1020 cm-3·eV-1。从图6(b)可见:TCAD电势模拟值和模型计算值基本吻合,相对误差在10%以内。需注意的是,有效载流子密度定义为自由载流子带尾态和深能态的有效值,且InGaZnO TFT的缺陷态的范围为1016~1022 cm-3·eV-1[29],这里NEFF的经验值约为nDA的100倍。

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图6 表面势在不同的类受主态密度下随底栅电压的变化

Fig. 6 Relationship between surface potential and gate voltage at different acceptor-like states

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图7 表面势在不同的类施主主态密度下随底栅电压的变化

Fig.7 Relationship between surface potential and gate voltage at different donor-like states

通过TCAD分析得到不同类施主带尾中心分布浓度nTD和不同类施主深能中心分布浓度nDD。由TCAD分析得到表面势φS随底栅电压变化的关系见图7。从图7(a)可见:当nTD从1.55×016 cm-3·eV-1增加到6.5×1022 cm-3·eV-1时,亚阈区表面势随着nTD增加而略微增加。从图7(b)可见:当nDD从4.5×1016 cm-3·eV-1增加到7.5×1016 cm-3·eV-1时,亚阈区表面势随着nDD增加而显著增加。这是因为类施主深能态密度增加导致沟道中的自由电子增加,从而影响到亚阈区的电势分布。

亚阈区表面势随施主缺陷态正增长的现象与模型中的等效平带电压VFB有关;nDD从5.5×1016 cm-3·eV-1变化到5.5×1016 cm-3·eV-1等效于所建模型中的VFB从0.3 V变化到-0.1 V。从图7(b)可见TCAD电势模拟值和模型计算值较吻合,两者相对误差在5%以内。

4  结论

1) 研究了独立电压偏置下异步对称双栅InGaZnO TFT的表面电势规律,并通过建立泊松方程得到异步双栅InGaZnO TFT表面电势的解析模型。考虑到表面电势与InGaZnO TFT的缺陷态密度的关联,引入等效平带电压的概念来表征器件的沟道表面电势在亚阈区范围内受顶栅电压线性调制的现象,该模型只需要2个拟合参数。最终利用平滑函数tanh(x)结合导通区表面势得到了完整的异步对称双栅InGaZnO TFT的表面势解析模型。

2) 有源层厚度和氧化层厚度对表面势的影响主要取决于沟道和界面处的载流子浓度。饱和区的表面电势随受主缺陷态密度增大而增大,亚阈区的表面电势随施主缺陷态密度增大而减小。在不同缺陷态密度下,电势模型的电势计算值与TCAD分析值相对误差均小于10%。

参考文献:

[1] ZHAO Jiaqing, YU Pengfei, QIU Shi, et al. Universal compact model for thin-film transistors and circuit simulation for low-cost flexible large area electronics[J]. IEEE Transactions on Electron Devices, 2017, 64(5): 2030-2037.

[2] LI Yunpeng, YANG Jin, WANG Yiming, et al. Complementary integrated circuits based on p-type SnO and n-type IGZO thin-film transistors[J]. IEEE Electron Device Letters, 2018, 39(2): 208-211.

[3] FENG Guangdi, ZHAO Yuhang, JIANG Jie. Lightweight flexible indium-free oxide TFTs with AND logic function employing chitosan biopolymer as self-supporting layer[J]. Solid-State Electronics, 2019, 153: 16-22.

[4] HU Wennan, JIANG Jie, XIE Dingdong, et al. Transient security transistors self-supported on biodegradable natural-polymer membranes for brain-inspired neuromorphic applications[J]. Nanoscale, 2018, 10(31): 14893-14901.

[5] YU Fei, MA Xiaoyu, DENG Wanling, et al. A surface-potential-based drain current compact model for a-InGaZnO thin-film transistors in Non-Degenerate conduction regime[J]. Solid-State Electronics, 2017, 137: 38-43.

[6] CAI Minxi, YAO Ruohe. A threshold voltage definition for modeling asymmetric dual-gate amorphous InGaZnO thin-film transistors with parameter extraction technique[J]. Journal of Applied Physics, 2019, 125(8): 084503.

[7] ZONG Zhiwei, LI Ling, JIANG Jin, et al. A new surface potential-based compact model for a-IGZO TFTs in RFID applications[C]// 2014 IEEE International Electron Devices Meeting. San Francisco, CA, USA. IEEE, 2014: 35.5.1-35.5.4.

[8] QIN Ting, LIAO Congwei, HUANG Shengxiang, et al. Analytical drain current model for symmetric dual-gate amorphous indium gallium zinc oxide thin-film transistors[J]. Japanese Journal of Applied Physics, 2018, 57(1): 014301.

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DENG Xiaoqqing, DENG Lianwen, HE Yini, et al. Leakage current model of InGaZnO thin film transistor[J]. Acta Physica Sinica, 2019, 68(5): 219-225.

[10] JEONG H, KONG C S, CHANG S W, et al. Temperature sensor made of amorphous indium-gallium-zinc oxide TFTs[J]. IEEE Electron Device Letters, 2013, 34(12): 1569-1571.

[11] RIZZOLO S, GOIFFON V, ESTRIBEAU M, et al. Influence of pixel design on charge transfer performances in CMOS image sensors[J]. IEEE Transactions on Electron Devices, 2018, 65(3): 1048-1055.

[12] CAPOCCIA R, BOUKHAYMA A, JAZAERI F, et al. Compact modeling of charge transfer in pinned photodiodes for CMOS image sensors[J]. IEEE Transactions on Electron Devices, 2019, 66(1): 160-168.

[13] BIN WAN ZAIDI W M H , COSTA J, POURYAZDAN A, et al. Flexible IGZO TFT SPICE model and design of active strain-compensation circuits for bendable active matrix arrays[J]. IEEE Electron Device Letters, 2018, 39(9): 1314-1317.

[14] WANG Cuicui, HU Zhijin, HE Xin, et al. One gate diode-connected dual-gate a-IGZO TFT driven pixel circuit for active matrix organic light-emitting diode displays[J]. IEEE Transactions on Electron Devices, 2016, 63(9): 3800-3803.

[15] JEON C H, UM J G, MATIVENGA M, et al. Fast threshold voltage compensation AMOLED pixel circuit using secondary gate effect of dual gate a-IGZO TFTs[J]. IEEE Electron Device Letters, 2016, 37(11): 1450-1453.

[16] BILLAH M M, HAN J U, HASAN M M, et al. Reduced mechanical strain in bendable a-IGZO TFTs under dual-gate driving[J]. IEEE Electron Device Letters, 2018, 39(6): 835-838.

[17] TAUR Y. An analytical solution to a double-gate MOSFET with undoped body[J]. IEEE Electron Device Letters, 2000, 21(5): 245-247.

[18] SAHOO A, THAKUR P K, MAHAPATRA S. A computationally efficient generalized Poisson solution for independent double-gate transistors[J]. IEEE Transactions on Electron Devices, 2010, 57(3): 632-636.

[19] HUANG Junkai, DENG Wanling, ZHENG Xueren, et al. A compact model for undoped symmetric double-gate polysilicon thin-film transistors[J]. IEEE Transactions on Electron Devices, 2010, 57(10): 2607-2615.

[20] KAMIYA T, NOMURA K, HOSONO H. Origins of high mobility and low operation voltage of amorphous oxide TFTs: electronic structure, electron transport, defects and doping[J]. Journal of Display Technology, 2009, 5(7): 273-288.

[21] KAMIYA T, NOMURA K, HIRANO M, et al. Electronic structure of oxygen deficient amorphous oxide semiconductor a-InGaZnO4-x: Optical analyses and first-principle calculations[J]. Physica Status solidi(C), 2008, 5(9): 3098-3100.

[22] 覃婷, 黄生祥, 廖聪维, 等. 同步对称双栅InGaZnO薄膜晶体管电势模型研究[J]. 物理学报, 2017, 66(9): 097101.

QIN Ting, HUANG Shengxiang, LIAO Congwei, et al. Analytical channel potential model of amorphous InGaZnO thin-film transistors with synchronized symmetric dual-gate[J]. Acta Physica Sinica, 2017, 66(9): 097101.

[23] FUNG T C, CHUANG C S, CHEN C, et al. Two-dimensional numerical simulation of radio frequency sputter amorphous In-Ga-Zn-O thin-film transistors[J]. Journal of Applied Physics, 2009, 106(8): 084511.

[24] ALVARADO J, INIGUEZ B, ESTRADA M, et al. Implementation of the symmetric doped double-gate MOSFET model in Verilog-A for circuit simulation[J]. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, 2010, 23(2): 88-106.

[25] HOORFAR A, HASSANI M. Inequalities on the Lambert W function and hyperpower function[J]. Journal of Inequalities in Pure & Applied Mathematics, 2008, 9(2): 1-5.

[26] MIGLIORATO P, SEOK M, JANG J. Determination of flat band voltage in thin film transistors: the case of amorphous-indium gallium zinc oxide[J]. Applied Physics Letters, 2012, 100(7): 073506.

[27] LI Can, LIAO Congwei, YU Tianbao, et al. Concise modeling of amorphous dual-gate In-Ga-Zn-O thin-film transistors for integrated circuit designs[J]. Chinese Physics Letters, 2018, 35(2): 27302.

[28] CHEN C, ABE K, KUMOMI H, et al. Density of states of a-InGaZnO from temperature-dependent field-effect studies[J]. IEEE Transactions on Electron Devices, 2009, 56(6):1177-1183.

[29] KIM Y, BAE M, KIM W, et al. Amorphous InGaZnO Thin-film transistors-part I: complete extraction of density of states over the full subband-gap energy range[J]. IEEE Transactions on Electron Devices, 2012, 59(10): 2689-2698.

(编辑  陈灿华)

收稿日期: 2019 -12 -26; 修回日期: 2020 -03 -10

基金项目(Foundation item):国家重点研发计划项目(2017YFA0204600);中南大学中央高校基本科研业务资助项目(2019zzts424) (Project(2017YFA0204600) supported by the National Key Research and Development Program of China; Project(2019zzts424) supported by the Fundamental Research Funds for the Central Universities of Central South University)

通信作者:邓联文,博士,教授,从事信息材料与微波技术、微电子技术等研究;E-mail:denglw@csu.edu.cn

摘要:针对异步对称双栅结构的氧化铟镓锌(InGaZnO)薄膜晶体管(thin film transistors,TFTs),求解泊松方程,并根据载流子在亚阈区、导通区的不同分布特点,在亚阈区引入等效平带电压的概念,在导通区运用Lambert W函数近似,建立异步对称双栅InGaZnO TFT表面电势解析模型。该模型的拟合参数只有2个,能够较好地反映介电层厚度、沟道电压等参数对电势的影响。基于所建模型及TCAD分析,研究InGaZnO层厚度、栅介质层厚度以及缺陷态密度等物理量对独立栅控双栅晶体管表面电势的影响。研究结果表明:在亚阈区,表面电势随着底栅电压增大呈近似线性增大,且在顶栅电压调制作用下平移;在导通区,表面电势随着底栅电压的增加逐步饱和,且电势值与顶栅调制电压作用相关度小。表面电势的解析模型与TCAD数值计算结果对比,具有较高的吻合度;在不同缺陷态密度分布情况下,电势模型的计算值与TCAD分析值相对误差均小于10%。本研究成果有利于了解双栅InGaZnO TFT的导通机制,可用于InGaZnO TFT的器件建模及相关集成电路设计。

[1] ZHAO Jiaqing, YU Pengfei, QIU Shi, et al. Universal compact model for thin-film transistors and circuit simulation for low-cost flexible large area electronics[J]. IEEE Transactions on Electron Devices, 2017, 64(5): 2030-2037.

[2] LI Yunpeng, YANG Jin, WANG Yiming, et al. Complementary integrated circuits based on p-type SnO and n-type IGZO thin-film transistors[J]. IEEE Electron Device Letters, 2018, 39(2): 208-211.

[3] FENG Guangdi, ZHAO Yuhang, JIANG Jie. Lightweight flexible indium-free oxide TFTs with AND logic function employing chitosan biopolymer as self-supporting layer[J]. Solid-State Electronics, 2019, 153: 16-22.

[4] HU Wennan, JIANG Jie, XIE Dingdong, et al. Transient security transistors self-supported on biodegradable natural-polymer membranes for brain-inspired neuromorphic applications[J]. Nanoscale, 2018, 10(31): 14893-14901.

[5] YU Fei, MA Xiaoyu, DENG Wanling, et al. A surface-potential-based drain current compact model for a-InGaZnO thin-film transistors in Non-Degenerate conduction regime[J]. Solid-State Electronics, 2017, 137: 38-43.

[6] CAI Minxi, YAO Ruohe. A threshold voltage definition for modeling asymmetric dual-gate amorphous InGaZnO thin-film transistors with parameter extraction technique[J]. Journal of Applied Physics, 2019, 125(8): 084503.

[7] ZONG Zhiwei, LI Ling, JIANG Jin, et al. A new surface potential-based compact model for a-IGZO TFTs in RFID applications[C]// 2014 IEEE International Electron Devices Meeting. San Francisco, CA, USA. IEEE, 2014: 35.5.1-35.5.4.

[8] QIN Ting, LIAO Congwei, HUANG Shengxiang, et al. Analytical drain current model for symmetric dual-gate amorphous indium gallium zinc oxide thin-film transistors[J]. Japanese Journal of Applied Physics, 2018, 57(1): 014301.

[9] 邓小庆, 邓联文, 何伊妮, 等. InGaZnO薄膜晶体管泄漏电流模型[J]. 物理学报, 2019, 68(5): 219-225.

[10] JEONG H, KONG C S, CHANG S W, et al. Temperature sensor made of amorphous indium-gallium-zinc oxide TFTs[J]. IEEE Electron Device Letters, 2013, 34(12): 1569-1571.

[11] RIZZOLO S, GOIFFON V, ESTRIBEAU M, et al. Influence of pixel design on charge transfer performances in CMOS image sensors[J]. IEEE Transactions on Electron Devices, 2018, 65(3): 1048-1055.

[12] CAPOCCIA R, BOUKHAYMA A, JAZAERI F, et al. Compact modeling of charge transfer in pinned photodiodes for CMOS image sensors[J]. IEEE Transactions on Electron Devices, 2019, 66(1): 160-168.

[13] BIN WAN ZAIDI W M H , COSTA J, POURYAZDAN A, et al. Flexible IGZO TFT SPICE model and design of active strain-compensation circuits for bendable active matrix arrays[J]. IEEE Electron Device Letters, 2018, 39(9): 1314-1317.

[14] WANG Cuicui, HU Zhijin, HE Xin, et al. One gate diode-connected dual-gate a-IGZO TFT driven pixel circuit for active matrix organic light-emitting diode displays[J]. IEEE Transactions on Electron Devices, 2016, 63(9): 3800-3803.

[15] JEON C H, UM J G, MATIVENGA M, et al. Fast threshold voltage compensation AMOLED pixel circuit using secondary gate effect of dual gate a-IGZO TFTs[J]. IEEE Electron Device Letters, 2016, 37(11): 1450-1453.

[16] BILLAH M M, HAN J U, HASAN M M, et al. Reduced mechanical strain in bendable a-IGZO TFTs under dual-gate driving[J]. IEEE Electron Device Letters, 2018, 39(6): 835-838.

[17] TAUR Y. An analytical solution to a double-gate MOSFET with undoped body[J]. IEEE Electron Device Letters, 2000, 21(5): 245-247.

[18] SAHOO A, THAKUR P K, MAHAPATRA S. A computationally efficient generalized Poisson solution for independent double-gate transistors[J]. IEEE Transactions on Electron Devices, 2010, 57(3): 632-636.

[19] HUANG Junkai, DENG Wanling, ZHENG Xueren, et al. A compact model for undoped symmetric double-gate polysilicon thin-film transistors[J]. IEEE Transactions on Electron Devices, 2010, 57(10): 2607-2615.

[20] KAMIYA T, NOMURA K, HOSONO H. Origins of high mobility and low operation voltage of amorphous oxide TFTs: electronic structure, electron transport, defects and doping[J]. Journal of Display Technology, 2009, 5(7): 273-288.

[21] KAMIYA T, NOMURA K, HIRANO M, et al. Electronic structure of oxygen deficient amorphous oxide semiconductor a-InGaZnO4-x: Optical analyses and first-principle calculations[J]. Physica Status solidi(C), 2008, 5(9): 3098-3100.

[22] 覃婷, 黄生祥, 廖聪维, 等. 同步对称双栅InGaZnO薄膜晶体管电势模型研究[J]. 物理学报, 2017, 66(9): 097101.

[23] FUNG T C, CHUANG C S, CHEN C, et al. Two-dimensional numerical simulation of radio frequency sputter amorphous In-Ga-Zn-O thin-film transistors[J]. Journal of Applied Physics, 2009, 106(8): 084511.

[24] ALVARADO J, INIGUEZ B, ESTRADA M, et al. Implementation of the symmetric doped double-gate MOSFET model in Verilog-A for circuit simulation[J]. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, 2010, 23(2): 88-106.

[25] HOORFAR A, HASSANI M. Inequalities on the Lambert W function and hyperpower function[J]. Journal of Inequalities in Pure & Applied Mathematics, 2008, 9(2): 1-5.

[26] MIGLIORATO P, SEOK M, JANG J. Determination of flat band voltage in thin film transistors: the case of amorphous-indium gallium zinc oxide[J]. Applied Physics Letters, 2012, 100(7): 073506.

[27] LI Can, LIAO Congwei, YU Tianbao, et al. Concise modeling of amorphous dual-gate In-Ga-Zn-O thin-film transistors for integrated circuit designs[J]. Chinese Physics Letters, 2018, 35(2): 27302.

[28] CHEN C, ABE K, KUMOMI H, et al. Density of states of a-InGaZnO from temperature-dependent field-effect studies[J]. IEEE Transactions on Electron Devices, 2009, 56(6):1177-1183.

[29] KIM Y, BAE M, KIM W, et al. Amorphous InGaZnO Thin-film transistors-part I: complete extraction of density of states over the full subband-gap energy range[J]. IEEE Transactions on Electron Devices, 2012, 59(10): 2689-2698.