Double-gate tunnel field-effect transistor: Gate threshold voltage modeling and extraction

LI Yu-chen(李妤晨), ZHANG He-ming(张鹤鸣), HU Hui-yong(胡辉勇), ZHANG Yu-ming(张玉明), WANG Bin(王斌), ZHOU Chun-yu (周春宇)

(Key Laboratory for Wide Band-Gap Semiconductor Materials and Devices,
School of Microelectronics, Xidian University, Xi’an 710071, China)

Abstract:The tunnel field-effect transistor (TFET) is a potential candidate for the post-CMOS era. As one of the most important electrical parameters of a device, double gate TFET (DG-TFET) gate threshold voltage was studied. First, a numerical simulation study of transfer characteristic and gate threshold voltage in DG-TFET was reported. Then, a simple analytical model for DG-TFET gate threshold voltage V_TG was built by solving quasi-two-dimensional Poisson equation in Si film. The model as a function of the drain voltage, the Si layer thickness, the gate length and the gate dielectric was discussed. It is shown that the proposed model is consistent with the simulation results. This model should be useful for further investigation of performance of circuits containing TFETs.

Key words:tunnel field-effect transistor; gated P-I-N diode; threshold voltage; modeling; extraction