基于开关电容技术设计高精度DFT

来源期刊：中南大学学报(自然科学版)2002年第2期

论文作者：蔡春娥

文章页码：214 - 217

关键词：开关电容;离散傅里叶变换;寄生电容

Key words：SC; DFT; parasitic capacitance

摘    要：用二相时钟设计了对寄生电容低灵敏的开关电容单位延时器、正负比例器和加法器.这些基本开关电容元件电容值均相等,电路性能与电容值无关,与电容比无关.利用这些基本元件实现了开关电容离散傅里叶变换,并进行了最佳电容值和最佳电容比设计,使电路具有运算精度高,运算速度快和便于实现大规模集成等优点.此外,以4阶开关电容离散傅里叶变换为例,进行模拟实验,测试数据最大相对误差为0.012%.

Abstract: Switched-capacitor(SC) unit-delayer, positive-negative proportors and adder were designed using two phase clocks. They have very low sensitivity to parasitic capacitance, all capacitances are the same in the SC component, circuits performance is no related with capacitances and rate of capacitance. SC discrete Fourier transformer(DFT) are achieved using the component, and the least capacitances and the most well rate of capacitance were designed. Finally,analog-experiment using 4-rank SC DFT was conducted. The results show that the circuit has high-accuracy and highspeed, the relative-error of the test data is very small.